- Tata Elxsi and Tensilica Announce RoS-ES RTOS for Diamond Standard and Xtensa Customizable DPUs
- Tata Elxsi's RoS-ES (Real Time Operating System for Embedded Systems) operating system is now available for Xtensa customizable dataplane processors (DPUs) and Diamond Standard processors from Tensilica, Inc., according to the two companies. The high performance, small footprint operating system represents an important addition to the growing ecosystem of the popular Xtensa architecture. Tata Elxsi's RoS-ES is a compact real-time operating...
http://www.tensilica.com
- Designing SOCs with Configured Cores : Unleashing the Tensilica Xtensa and Diamond Cores
- Designing SOCs with Configured Processor Cores is an essential reference for system-on-chip designers. This well-written book gives a practical introduction to three basic techniques of modern SOC design: use of optimized standard CPU and DSP processors cores, application-specific configuration of processor cores, and system-level design of SOCs using configured cores as the key building block. Readers will find it is often the first book...
http://www.amazon.com
- Configurable Processors: What, Why, When, How
- A new type of processor core has been getting a lot of attention lately - a processor you can tailor for a specific application. Configurable processors are much faster and can do much more than standard embedded microprocessors. Some can even replace hand-coded RTL in ASICs and SOCs. What is a configurable processor? What can configurable processors do? Why would anyone want to use this type of processor? How can a configurable processor...
http://www.tensilica.com/products/WP_config.htm
- myCSoC: Design Explorations With Your Configurable System on a Chip
- Triscend Corp. has developed a configurable system on a chip (CSoC) that combines programmable logic with an 8032 microcontroller core in a single device. Application software runs in the 8032 with assistance from peripherals built with soft modules in the programmable logic. Combined with their FastChip development software, you can now design systems where both the software and hardware can be changed at a moment's notice.
http://www.xess.com/myCSoC-CDROM.html
- Tensilica Introduces Small, Ultra-Low Power Dataplane Processor Core for Deeply Embedded Control
- Tensilica, Inc. today introduced the Xtensa 8 customizable processor, the eighth generation of its market leading low-power dataplane processor cores (DPUs). The Xtensa 8 processor core starts at a size of just 15,000 gates, consuming less than 0.05mm2 in 40nm process technology - making it one of the smallest licensable controller cores on the market. With power dissipation starting at just 12 µW/MHz, it's also one of the lowest power...
http://www.tensilica.com
- New Tensilica DPU Family Delivers 10 GigaMAC/sec DSP Performance, Tops 1 GHz Mark
- Tensilica, Inc. today introduced the Xtensa LX3 high-performance dataplane processor (DPU) core optimized for digital signal processing (DSP) and control in the system-on-chip (SOC) dataplane. The Xtensa LX3 DPU offers the industry's widest range of pre-verified DSP options ranging from a simple floating point accelerator to a 16-MAC (multiply accumulator) vector DSP powerhouse. The base Xtensa LX3 DPU configuration can reach speeds of...
http://www.tensilica.com
- Linux on Xtensa
- This portal is the primary resource for the community of developers and users of the Linux operating system on Xtensa processors. The Xtensa processor architecture is a configurable, extensible, and synthesizable 32-bit RISC processor core. Processor and SOC vendors can select from various processor options and even create customized instructions in addition to a base ISA to tailor the processor for a particular application. You have...
http://www.linux-xtensa.org/
- Tensilica Announces Enhanced Tools for Dataplane Processor Design and Software Development
- Tensilica Inc. today announced its eighth generation tools that further automate customized Xtensa dataplane processor (DPU) design and speed software development. Improvements cover improved compiler technology, better multi-core system simulation and profiling, an upgraded integrated development environment (IDE), and pin-level co-simulation with RTL. These enhancements further strengthen Tensilica's leading position as the highest...
http://www.tensilica.com
- ARC International - White Papers
- ARChitect White Paper: ARChitect Processor Configurator is used by SoC designers to rapidly create customized ARC processor core designs optimized for specific applications. Customizing a Soft Microprocessor Core: This three-page white paper is a quick, easy introduction to user-customizable microprocessor technology and the ARCtangent-A4 processor. How to Reduce Time-to-Market for System-on-Chip Design: How can complex designs be achieved...
http://www.arc.com/documentation/whitepapers.html
- Processor Designs for Embedded Systems
- The IBM PC and the Macintosh, both launched around 1982, are the last well-known computer lines that were based on traditional CISC processors. That is a processor having a rich and diverse instruction set thanks to an internal read-only microprogram store for the control of its internal operation. In 1980, Patterson (UC Berkeley) and Hennessy (Stanford) proposed a different kind of computer processor, a simplified but efficiently...
http://www.imsystech.com
Explanation: these links are provided as part of our EE glossary project, which seeks to identify the most prominent keywords in embedded systems, embedded software, realtime and rtos, dsp (digital signal processing), system-on-a-chip, microprocessors and microcontrollers, and other constituent elements for embedded systems. While we seek to keep most of the links up-to-date, the user is refered to other primary electronic-based search sites such as: cera2.com, embedded.com, or EDN Magazine. If you have any suggestions of links or definitions, please email!
config. processors